HUINS MFP-VU19P-PCIe: Virtex UltraScale+ VU19P FPGA Prototyping Board

Features What's Included Resources & Downloads Description 9M logic cells in a PCIe card. Keep larger RTL partitions on one FPGA; connect the prototype directly to a host through PCIe Gen4 x8; exercise memory, application-specific I/O and serial links on the same platform. 8GB onboard DDR4, supplied 8GB SODIMM, 36 routed GTY lanes, dual FMC+ and dual QSFP+. For ASIC/SoC prototyping, PCIe subsystem validation, acceleration and high-speed interface bring-up. FPGA Specification Logic System Logic Cells (K) 8,938 CLB Flip-Flops (K) 8,172 CLB LUTs (K) 4,086 Memory Max. Distributed RAM (Mb) 58.4 Total Block RAM (Mb) 75.9 UltraRAM (Mb) 90.0 DSP DSP Slices 3,840 Peak INT8 DSP (TOP/s) 10.4 Hardened IP PCIe Gen3 x16 / Gen4 x8 8 Transceivers and I/O GTY 32.75Gb/s Transceivers 80 Max. Single-Ended HP I/Os 1,976 Max. Single-Ended HD I/Os 96 Package and Grade FPGA XCVU19P-2FSVB3824E Footprint B3824, 65 × 65mm, 1.0mm ball pitch B3824 HPIO / HDIO / GTY 1,664 / 96 / 80 Speed Grade -2 Temperature Grade Extended, 0°C to 110°C junction temperature Source: UltraScale+ FPGA Product Selection Guide. Device maxima do not mean every resource is routed to a board connector. Features FPGA Device XCVU19P-2FSVB3824E, chip-mounted Memory Onboard DDR4 8GB DDR4 SODIMM 1× slot; supplied with Samsung 8GB DDR4-3200, 1Rx8, M471A1K43EB1-CWE High-Speed Interfaces PCIe Gen3 x16 / Gen4 x8; selectable x1/x4/x8/x16 lane width shown by HUINS FMC+ 2× FMC HSPC+; aggregate 36 GTY + 160 I/O according to HUINS QSFP+ 2× ports Ethernet 10/100/1000BASE-T User I/O Switches 8× DIP switches; 3× push buttons Headers 16-pin XIO header; 10-pin MIO header LEDs 12× user LEDs Cooling and Power FPGA Cooling Fitted active cooling assembly Supplied PSU 12V, 12.5A; 6-pin Molex connector What's Included 1× HUINS MFP-VU19P-PCIe board with fitted cooling assembly 1× Samsung 8GB DDR4-3200 SODIMM, M471A1K43EB1-CWE 1× 12V, 12.5A power supply with 6-pin Molex connector 1× USB Micro cable 1× SD card Resources & Downloads UltraScale+ FPGA Product Selection Guide Full documentation including the user manual, pinout list and schematics will be provided by CodeRobin.