ALINX AXRF67: Xilinx Zynq UltraScale+ RFSoC XCZU67DR FPGA Development Board

Features What's Included Resources & Downloads Description AMD Zynq™ UltraScale+™ RFSoCs - The Industry’s Only Single-Chip Adaptable Radio Platform AMD Zynq™ UltraScale+™ RFSoC Gen 3: Quad-core Arm Cortex-A53 MPCore up to 1.33 GHz Dual-core Arm Cortex-R5F MPCore up to 533 MHz 16nm FinFET+ Programmable Logic Soft-decision forward error-correction cores (SD-FEC) Source: https://www.amd.com/en/products/adaptive-socs-and-fpgas/soc/zynq-ultrascale-plus-rfsoc.html AXRF67 is a compact Mid range SDR board with XCZU67DR FPGA, equipped with 8×14-bit 2.95GSPS RF-ADCs, 8×14-bit 10GSPS RF-DACs, 6GB DDR4, 1x QSFP28, 1x SFP+, GPS, 2T4R RF SMA ports, direct RF sampling below 7.125GHz, 9~40V wide‑voltage input. Ideal for 5G, Radar, Satellite, and Wideband. Ideal for: 5G and LTE Wireless Remote-PHY for Cable Access DOCSIS 3.1 Phased Array Radar/Digital Array RADAR Test & Measurement Satellite Communications The SOM model is ACRF67. Also check out our AXRF49 with XCZU49DR. FPGA Specification SOM ACRF67 FPGA XCZU67DR-2FFVE1156I 14-bit RF-ADC w/DDC 8x, Max Rate (GSPS) 2.95 2x, Max Rate (GSPS) 5.9 14-bit RF-DAC w/DUC 8x, Max Rate (GSPS) 10 Digital Front-End Hard IP (DFE IP) Channel Filter, DUC/DDC, Mixer, CFR, Complex Equalizer, PQ Resampler, DPD Low PHY Hard IP FFT/iFFT, PRACH Number of DDCs per RF-ADC 1 RF input Freq max. GHz 7.125 Decimation / Interpolation 1x, 2x, 3x, 4x, 5x, 6x, 8x, 10x, 12x, 16x, 20x, 24x, 40x Processors 4x ARM Cortex-A53, 1.3GHz 2x ARM Cortex-R5F, 533MHz High-Speed Connectivity 4 PS-GTR; PCIe Gen1/2; Serial ATA 3.1; DisplayPort™ 1.2a; USB 3.0; SGMII General Connectivity 214 PS I/O; UART; CAN; USB 2.0; I2C; SPI; 32b GPIO; Real Time Clock; Watchdog Timers; Triple Timer Counters GTY 8x Chip Level Industrial Grade Speed Grade -2 Working Temperature -40℃~85℃ System Logic Cells (K) 489 CLB LUTs (K) 224 Max. Dist. RAM (Mb) 6.8 Total Block RAM (Mb) 22.8 UltraRAM (Mb) 45.0 DSP Slices 1,872 1.8V High-Performance (HP) I/Os 130 3.3V High-Density (HD) I/O 24 Board Features DDR4 PS: 4x 1GB DDR4, total 4GB, 64bit Bus, Data Rate 2400Mbps PL: 2x 1GB DDR4, total 2GB, 32bit Bus, Data Rate 2400Mbps QSPI FLASH 2x 512Mbit, for user data storage QSFP28 1x SFP+ 1x SMA 4x, RF-ADC 14bit max 2.95GSPS 2x, RF-DAC 14bit max 10GSPS SMA 5x, CLK IN/OUT, GPS, TRIG IN/OUT, M.2 1x NVME M.2 (PCIEx1), for M.2 SSD storage USB 3.0 1x USB3.0, (Type-A, HOST, SLAVE), for external USB devices USB JTAG / UART 1x Type-C, UART for serial communication with PC or devices JTAG for Programs Debug and Download Ethernet Interface 1x 10/100/1000M Ethernet with RJ45 for data exchange DisplayPort 1x mini DisplayPort, support VESA DisplayPort V1.2a GPS 1x NEO-M8N Active Crystal Oscillator 1x Single-ended 33.3333MHz provide PS Clock 1x LMK04828 for the PL Logic, DDR Reference, GTY Expansion Port 2x 8-pin PL I/O (PMODx2); 1x 10-pin PS I/O (JST) EEPROM 1x AT24CM01 with IIC SD Card Slot 1 micro SD Card Slot, support SD Mode and SPI Mode Real Time Clock 1x Built-in RTC LEDs SOM: Carrier: 4x User Push-Buttons 1x Reset Power Supply Voltage Input: +9 ~ +40 V DC, Barrel plug Minimum Input Power: 90W What's Included FPGA Board 1 DC Fan (installed) 1 USB to Type-C cable 1 12V Power Adapter 1 set SMA Cable 4x 20cm; 2x 50cm 5G Omnidirectional Antenna and base 4x SD Card 1x 32GB SD Card Reader 1 Dimensions Dimension 170.00 mm x 170.00 mm (Carrier Board) 115.00 mm x 85.00 mm (SOM) PCB - Layer (Carrier Board) 14 Layer (SOM) Independent GND and Power Layers Resources & Downloads AXRF67 User Manual (PDF, Simplified Chinese) Full documentation including Schematics, Demo projects (if applicable) will be provided by CodeRobin.